Manufacturing a three-dimensional (3D) stacked semiconductor memory such as the 3D NAND flash memory includes a process of etching a multilayer stacked film into a stepped configuration using a plasma (see e.g. Patent Document 1). When performing mask trimming in such a process, it is important to increase the etch rate of etching a mask material in the lateral direction with respect to the etch rate of etching in the vertical direction.
Conventionally, the above effect is achieved by decreasing an ion energy of ions that contribute to etching the mask material in the vertical direction so that etching in the vertical direction may be suppressed and encouraging isotropic etching by radicals.